Cy802 300MHz ~ 450MHz Sop16 Integrated Circuit Wireless RF Receiver Chip IC

• Conductive Type: Unipolar Integrated Circuit
• Integration: GSI
• Shape: DIP
• Frequency: 300MHz ~ 450MHz
• Sensitivity: -109dBm
• Data Rate: up to 10kbps
• Model NO.: Cy802
• Current: 3.9~6.0mA
• Voltage: 3.0~5.5V
• Ambient Temperature: -30° C to 85° C
• Packaging: Sop-16
• Lead Time: 3 Weeks After Receiving Payment
• Ship by: DHL/FedEx/UPS
• MOQ: 100PCS
• Rssi: Yes
• Transport Package: Reel
• Trademark: CY
• Origin: China
• HS Code: 8542399000
• Production Capacity: 200000PCS/Year

Product Description

General Description

The CY802 is a general purpose, 3V-5.5V ASK Receiver that operates at 300-450MHz with typical sensitivity of -109dBm.

The CY802 functions as a super-heterodyne receiver for OOK and ASK modulation up to 10kbps. The down-conversion mixer also provides image rejection. All post-detection data filtering is provided on the CY802. Any one-of-four filter bandwidths may be selected externally by the user in binary steps, from 1.25KHz to 10KHz.  The  user need only configure the device with a set of easily determined values, based upon data rate, code modulation format, and desired duty-cycle operation.
CY802 is the SOP16 package version.

 

Features

1. -109 dBm sensitivity, 1kbps and BER 10E-02
2. Frequency from 300MHz to 450MHz
3. Supply Voltage from 3V to 5.5V
4. Image Rejection Mixer Data-rate up to 10kbps (fixed-mode)
5. Low power, 6.0mA, 3.3V @ 433.92MHz, 3.9mA, 3.3V @315MHz, continuous on data rates to 10kbps (Manchester Encoded)
6. Analog RSSI Output
7. No IF filter required
8. Excellent selectivity and noise rejection

Applications

1. Automotive Remote Keyless Entry (RKE)
2. Remote controls
3. Remote fan and light control
4. Garage door and gate openers

 Pin Configuration

Pin Description

SSOP16	Pin Name	Pin Function
1	RO1	Reference resonator input connection to Colpitts oscillator stage.   May also be driven by external reference signal of 1.5V p-p amplitude maximum.
2	GNDRF	Negative supply connection associated with ANT RF input.
3	ANT	RF signal input from antenna.   Internally AC coupled. It is recommended that a matching network with an inductor -to-RF ground is used to improve ESD protection.
4	GNDRF	Negative supply connection associated with ANT RF input.
5	VDD	Positive supply connection for all chip functions.
6	NC	Not Connected (Floating)
7	SEL0	Logic control input with active internal pull-up.   Used in conjunction with SEL1 to control the demodulator low pass filter bandwidth.    (See filter table for SEL0 and SEL1 in application section)
8	SHDN	Shutdown logic control input. Active internal pull-up.
9	GND	Negative supply connection for all chip functions except RF input.
10	DO	Demodulated data output.
11	SEL1	Logic control input with active internal pull-up.   Used in conjunction with SEL0 to control the demodulator low pass filter bandwidth.   (See filter table for SEL0 and SEL1 in application section)
12	CTH	Demodulation threshold voltage integration capacitor connection.   Tie an external capacitor across CTH pin and GND to set the settling time for the demodulation data slicing level.   Values above 1nF are recommended and should be optimized for data rate and data profile.
13	CAGC	AGC filter capacitor connection. CAGC capacitor, normally greater than 0.47µF, is connected from this pin to GND
14	RSSI	Received signal strength indication output. Output is from a buffer with 200 typical output impedance.
15	NC	Not Connected (Connect to Ground)
16	RO2	Reference resonator input connection to Colpitts oscillator stage, a 18pF capacitor is connected from this pin to GND during normal operation.